4.9 MCU Ethernet Interface
The EVM includes RGMII connection between DP83867ERGZT Gigabit Ethernet PHY and the MCU domain
network subsystem (NSS) of the Processor. RJ45 connector (J35) with Integrated magnetics LPJG163144NL is
used.
A reference clock of 25 Mhz will be generated onboard using a crystal to DP83867ERGZT.
Figure 4-15. MCU Gigabit Ethernet Block
The I/O supply to the Ethernet PHY is set through selection Resistors R445 and R446 to support both 1.8 V and
3.3 V I/O level. The EVM is configured to 3.3 V I/O supply for MCU RGMII PHY I/O signals by default.
J721E EVM Hardware Architecture www.ti.com
48 Jacinto7 J721E/DRA829/TDA4VM Evaluation Module (EVM) SPRUIS4D – MAY 2020 – REVISED MARCH 2022
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