YOKOGAWA DLM4038 User Manual

5-224
IM DLM4038-17EN
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:CS:SOURce
Function Sets or queries the chip select signal for user-
defined bus signal analysis.
Syntax
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:CS:SOURce {<NRf>|NONE}
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:CS:SOURce?
<x> = 1 to 4
<NRf> = 1 to 8
Example
:SERIALBUS1:SPATTERN:ANALYZE:SETUP:C
S:SOURCE 1
:SERIALBUS1:SPATTERN:ANALYZE:SETUP:C
S:SOURCE?
-> :SERIALBUS1:SPATTERN:ANALYZE:SETU
P:CS:SOURCE 1
Description The chip select signal that you can specify varies
depending on the
:SERialbus<x>:SPATtern[
:ANALyze]:SETup:DATA:SOURce
setting.
For details, see the DLM4000 User’s Manual.
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:DATA?
Function Queries all data signal settings for user-defined
bus signal analysis.
Syntax
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:DATA?
<x> = 1 to 4
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:DATA:ACTive
Function Sets or queries the data signal active state for
user-defined bus signal analysis.
Syntax
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:DATA:ACTive {HIGH|LOW}
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:DATA:ACTive?
<x> = 1 to 4
Example
:SERIALBUS1:SPATTERN:ANALYZE:SETUP:D
ATA:ACTIVE HIGH
:SERIALBUS1:SPATTERN:ANALYZE:SETUP:D
ATA:ACTIVE?
-> :SERIALBUS1:SPATTERN:ANALYZE:SETU
P:DATA:ACTIVE HIGH
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:DATA:SOURce
Function Sets or queries the data signal for user-defined
bus signal analysis.
Syntax
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:DATA:SOURce {<NRf>}
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:DATA:SOURce?
<x> = 1 to 4
<NRf> = 1 to 8
Example
:SERIALBUS1:SPATTERN:ANALYZE:SETUP:D
ATA:SOURCE 1
:SERIALBUS1:SPATTERN:ANALYZE:SETUP:D
ATA:SOURCE?
-> :SERIALBUS1:SPATTERN:ANALYZE:SETU
P:DATA:SOURCE 1
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:LATCh?
Function Queries all latch signal settings for user-defined
bus signal analysis.
Syntax
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:LATCh?
<x> = 1 to 4
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:LATCh:POLarity
Function Sets or queries the latch signal slope for user-
defined bus signal analysis.
Syntax
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:LATCh:POLarity {FALL|RISE}
:SERialbus<x>:SPATtern[:ANALyze]:SET
up:LATCh:POLarity?
<x> = 1 to 4
Example
:SERIALBUS1:SPATTERN:ANALYZE:SETUP:L
ATCH:POLARITY FALL
:SERIALBUS1:SPATTERN:ANALYZE:SETUP:L
ATCH:POLARITY?
-> :SERIALBUS1:SPATTERN:ANALYZE:SETU
P:LATCH:POLARITY FALL
5.25 SERialbus Group

YOKOGAWA DLM4038 Specifications

General

Brand	YOKOGAWA
Model	DLM4038
Category	Test Equipment
Language	English