ACT apricot - Processor Interface

FLOPPY DISK INTERFACE
The internal registers provide the means of exchanging
information (commands, status, positional data) between
the disk drive controller and the processor interface.
Processor Interface
The connections to the processor interface are detailed in
the table "System Connections" at the end of the chapter.
The majority of the circuitry is a straightforward interface
between the 8-bit bi-directional peripherals data bus and the
series of addressable registers located within the FDC.
The system software views the registers as a series of
peripheral ports located in the system input/output space.
The port address locations as defined by the FDC select and
the system address bus connections, are detailed below. The
Data, Sector and Track Registers can be written to and read
from.
The Command Register can only be written to, and
the Status Register can only be read from.
Register
Address
Command
40H
Status 40H
Track 42H
Sector
44H
, Data
46H
The remaining circuitry of the processor interface
consists of the control section, which produces the lNTRQ
and DRQ outputs.
The DRQ output is activated (set to logic high), during
data transfer operations to and from the disk, and follows
the state of an associated control bit within the Status
Register. During disk read operations, the DRQ output is set
active when the FDC has data available from the disk
within the Data Register. The output is reset to the inactive
state when the byte is read by the lOP.
During data write and formatting operations, the DRQ
output is set active when the FDC Data Register is empty,