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ACT apricot - Address Allocation

ACT apricot
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EXPANSION SLOTS
External
Terminate
for
DMA
Channel
2.
Input
connected
to
the
External
Terminate
line
(EXT2) of
the
8089
lOP
via
an
inverter. A
logic
low
on
EXT2
requests
the
lOP
to
terminate
the
current
DMA
transfer
operation
on
DMA
Channel
2.
Interrupt
Request
(Priority
2).
Input
line
connected
to
the
Interrupt
Request
2
input
of
the
Programmable
Interrupt
Controller
(PIC)
via
an
inverter.
The
interrupt
type
number
supplied
to
the
8086 processor
on
acknowledgement
of
the
interrupt
request
is
52H. (The
interrupt
type
number
acts
as a
pointer
to
the
interrupt
service routine.)
Interrupt
Request
(Priority 3).
Input
line
connected
to
the
Interrupt
Request
3
input
of
the
PIC
via
an
inverter.
The
interrupt
type
number
supplied
to
the
8086 processor
on
acknowledgement
of
the
interrupt
request
is
53H. (The
interrupt
type
number
act as a
pointer
to
the
interrupt
service routine.)
Non-Maskable
Interrupt.
Input
connected
to
the
NMI
input
of
the
8086_processor
via
an
inverter. A logic
high
to
low
transition
on
NMI
generates
the
predefined
interrupt
type
number2
internally
within
the
8086,
which
acts
as a
pointer
to
an
interrupt
service
routine.
Address Allocation
The
available address
locations
in
the
system
memory
space
and
input/output
space
allocated
to
the
Expansion
Slots are
detailed
below. 8-bit devices
connected
to
the
lower
half
of
the
data
bus
must
be
located
on
even
address
boundaries
and
8-bit devices
connected
to
the
upper
half,
on
odd address boundaries.
System
memory:
40000H
to
EFFFFH.
System
I/O:
80H
to
IFFH
excluding
F8H to FFH.

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