ACT apricot - List of Illustrations Figure

List of Contents Page
INTRODUCTION ...................... .... ... ....... ............. ...... ... 1
DESCRIPTION .......... .......... ....... ........ ......................... ... 2
General ............................................................................ 2
CounterO ........................................................................ 5
Counter 1 and 2 ............................................................... 6
Baud Rates ....................................................................... 8
List of Illustrations
Figure
Programmable
Interval Timer block diagram ............... 1
Mode
0 timing diagram .................................................. 2
Mode 3
timing diagram .................................................. 3
INTRODUCTION
The Intel 8253-5 Programmable Interval Timer (TMR) is
located
on the System Board. The timer utilizes two clock
inputs from a divider circuit to generate:
(a) A clock output (OUTO), which is connected to an
interrupt request line (IR6) of the Interrupt Controller
(PIC). The output provides a means of generating
accurate timing delays under software control.
(b) Two squarewave clock outputs (OUTl and OUT2)
which can be used to set the baud rates for the RS232C
serial interface.
The frequencies of the two clock
outputs are determined by software.