ACT apricot - Disk Write; Diskread

FLOPPY DISK INTERFACE
Disk Write
Disk write operations are initiated by the CPU issuing a
write command byte to the FDC over the peripherals data
bus.
The FDC then searches for the required destination on
the disk for the data (correct side, track and sector, with the
correct ID field CRC bytes). When the required location is
found,
the FDC signifies to the lOP that a data byte is
required by issuing a DMA request, via the DRQ output.
The disk write cycle then proceeds as follows:
1. The lOP writes the first data byte into a holding
register (termed the Data Register) within the FDC.
2. The FDC resets the DRQ output and transfers the
contents of the Data Register to an encoding circuit,
and signifies to the lOP that another data byte is
required.
3.
The encoding circuit converts the byte into MFM
encoded
data and then writes the data to the disk.
4.
The lOP responds by writing the next data byte ipto
the Data Register.
5. The process is then repeated.
After
the last data byte in the sector is written onto the
disk, a two-byte CRC is computed internally within the
FDC, which is then also written onto the disk.
On completing a write cycle (completed write operation
to either a single sector or multiple sectors within a track),
the FDC generates an interrupt request on the INTRQ
output. The interrupt request performs a dual function. It
informs the lOP to terminate the DMA transfer routine and
also indicates to the CPU the end of the command cycle (via
the Interrupt Controller). The CPU then can check a status
register within the FDC to see whether any errors occurred
during the write operation. Reading the Status Register or
writing a new command to the FDC, automatically resets
the INTRQ output.
Disk Read
Disk read operations are initiated by the CPU issuing a
read
command byte to the FDC over the peripherals data