ACT apricot - Page 75

CRT CONTROL
The mode select line affects two different areas of the
circuitry, the timing generator and the video interface. The
effect produced on the timing generator is to change the
frequency of the two signals, CCLK (character clock)
supplied
to the CRTC, and LES (load data) supplied to the
shift register.
CCLK is
the basic timing signal used by the CR TC and
defines
the rate at which the refresh addresses change, and
thus the character width on the screen. The clock frequency
is derived from
the 15 MHz dot clock. In the text mode, the
timing generator divides the dot clock by 10 (10 pixel width
text cell: refresh addresses change at a frequency of 1.5 MHz
during the active scan period). In the graphics mode, the dot
clock is divided
by 16 (16 pixel width graphics cell; refresh
addresses change
at a frequency of 15/16 MHz during the
active scan period).
LES controls the loading of the 16-bit data from the
System RAM into the shift register. The shift register
moves
the data out of the register at the 15 MHz dot clock
frequency. In
the text mode, the frequency of LES is 1.5
MHz, so
that every time 10 bits are shifted out of the
register a new 16-bit character row is loaded in (In the text
mode only the 10 LSB of the 16-bit data are used for display).
In the graphics mode, the frequency of LES is 15/16 MHz, so
that the full 16-bits of data are shifted out of the shift
register, before a
new 16-bit graphics cell row is loaded in.
On the video interface, the mode control line determines
whether the attribute bits and cursor control signal are
enabled or disabled.
The attribute bits and cursor control
signal are enabled
in the text mode, disabled in graphics.