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Allen-Bradley PLC-5

Allen-Bradley PLC-5
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Publication 1785-UM012D-EN-P - July 2005
B-2 Processor Status File
S:2Switch setting information
S:2/00
through
S:2/05
Channel 1A DH+ station number
S:2/06 Channel 1A DH+ baud rate
057.6 kbps
1230.4 kbps
S:2/07
S:2/08
Not defined
S:2/09 Last state
0outputs are turned off
1outputs retain last state
S:2/11
S:2/12
I/O chassis addressing
bit 12
bit 11
00illegal
101/2-slot
011-slot
112-slot
S:2/13
S:2/14
Memory module transfer
bit 14
bit 13
00memory module transfers to controller memory
if controller memory is not valid
01memory module does not transfer to
controller memory
11memory module transfers to controller memory
at powerup
S:2/15 Controllercontroller memory protection
0enabled
1disable
This Word Stores

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