Introduction
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 1-2
ID073015 Non-Confidential
1.1 About the processor
The Cortex-R4 processor is a mid-range processor for use in deeply-embedded, real-time
systems. It implements the ARMv7R architecture, and includes Thumb-2 technology for
optimum code density and processing throughput. The pipeline has a single Arithmetic Logic
Unit (ALU), but implements limited dual-issuing of instructions for efficient utilization of other
resources such as the register file.
The processor has Tightly-Coupled Memory (TCM) ports for low-latency and deterministic
accesses to local RAM, in addition to caches for higher performance to general memory.
Error Checking and Correction (ECC) is used on the Cortex-R4 processor ports and in Level 1
(L1) memories to provide improved reliability and address safety-critical applications.
Many of the features, including the caches, TCM ports, and ECC are configurable so that a given
processor implementation can be tailored to the application for efficient area usage.
Figure 1-1 shows the processor in a typical system.
Figure 1-1 Example Cortex-R4 system
DMA
Cortex-R4 processor
AXI-M
Peripherals
ROM RAM
AXI-S
CoreSight
debug sub-
system
JTAG
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