Preface
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. viii
ID073015 Non-Confidential
About this book
This book is for Cortex-R4 and Cortex-R4F processors.
• The Cortex-R4F processor is a Cortex-R4 processor that includes the optional Floating
Point Unit (FPU) extension.
• In this book, references to the Cortex-R4 processor also apply to the Cortex-R4F
processor, unless the context makes it clear that this is not the case.
Product revision status
The rnpn identifier indicates the revision status of the product described in this book, where:
rn Identifies the major revision of the product.
pn Identifies the minor revision or modification status of the product.
Intended audience
This book is written for system designers, system integrators, and programmers who are
designing or programming a System-on-Chip (SoC) that uses the processor.
Using this book
This book is organized into the following chapters:
Chapter 1 Introduction
Read this for an introduction to the processor and descriptions of the major
functional blocks.
Chapter 2 Functional Description
Read this for a description of the functionality of the processor.
Chapter 3 Programmers Model
Read this for a description of the processor registers and programming
information.
Chapter 4 System Control
Read this for a description of the system control coprocessor registers and
programming information.
Chapter 5 Prefetch Unit
Read this for a description of the functions of the Prefetch Unit (PFU), including
dynamic branch prediction and the return stack.
Chapter 6 Events and Performance Monitor
Read this for a description of the Performance Monitoring Unit (PMU) and the
event bus.
Chapter 7 Memory Protection Unit
Read this for a description of the Memory Protection Unit (MPU) and the access
permissions process.
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