System Control
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 4-7
ID073015 Non-Confidential
4.2 Register summary
The system control coprocessor appears as a set of registers that you can write to and read from.
Some of the registers permit more than one type of operation. The functional groups for the
registers are:
• System identification control and configuration on page 4-2
• MPU control and configuration on page 4-3
• Cache control and configuration on page 4-3
• Interface control and configuration on page 4-4
• System performance monitor on page 4-4
• System validation on page 4-5.
Table 4-1 shows the overall functionality for the system control coprocessor, provided through
the registers. The registers are listed in their functional groups.
Table 4-2 on page 4-9 lists the registers in the system control processor, in register order, and
gives the reset value for each register.
Table 4-1 System control coprocessor register functions
Function Register/operation Reference to description
System identification,
control and
configuration
Control c1, System Control Register on page 4-37
Auxiliary control c1, Auxiliary Control Register on page 4-40
Coprocessor Access Control c1, Coprocessor Access Register on page 4-46
Main ID
a
c0, Main ID Register on page 4-14
Product Feature IDs • The Processor Feature Registers on page 4-18
• c0, Debug Feature Register 0 on page 4-20
• c0, Auxiliary Feature Register 0 on page 4-21
• Memory Model Feature Registers on page 4-21
• Instruction Set Attributes Registers on page 4-26
Multiprocessor ID c0, Multiprocessor ID Register on page 4-18
Context ID c13, Context ID Register on page 4-64
FCSE PID c13, FCSE PID Register on page 4-64
Build Options 1 c15, Build Options 1 Register on page 4-77
Build Options 2 c15, Build Options 2 Register on page 4-78
Software compatibility Thread And Process ID c13, Thread and Process ID Registers on page 4-65
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