ARM Cortex-R4 - 3.3 Memory model

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3.3 Memory model
The processor views memory as a linear collection of bytes numbered in ascending order from
zero. For example, bytes 0-3 hold the first stored word, and bytes 4-7 hold the second stored
word.
The processor can treat words of data in memory as being stored in either:
• Byte-invariant big-endian format
• Little-endian format.
Additionally, the processor supports mixed-endian and unaligned data accesses. For more
information, see the ARM Architecture Reference Manual.
3.3.1 Byte-invariant big-endian format
In byte-invariant big-endian (BE-8) format, the processor stores the most significant byte of a
word at the lowest-numbered byte, and the least significant byte at the highest-numbered byte.
Figure 3-1 shows byte-invariant big-endian (BE-8) format.
Figure 3-1 Byte-invariant big-endian (BE-8) format
3.3.2 Little-endian format
In little-endian format, the lowest-numbered byte in a word is the least significant byte of the
word and the highest-numbered byte is the most significant. Figure 3-2 shows little-endian
format.
Figure 3-2 Little-endian format
Memory Register
Address
A[31:0]
+1
msbyte
lsbyte
+2
+3
B0
07
B1
B3B2B0 B1
31 24 23 16 15 8 7 0
B2
B3
Memory Register
Address
A[31:0]
+1
msbyte
lsbyte
+2
+3
b0
07
b1
b0b1b3 b2
31 24 23 16 15 8 7 0
b2
b3