ARM Cortex-R4 - 1.7 Product documentation, architecture and design flow

Introduction
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 1-11
ID073015 Non-Confidential
1.7 Product documentation, architecture and design flow
This section describes the Cortex-R4 processor books, how they relate to the design flow, and
the relevant architectural standards and protocols. It contains the following sections:
• Documentation
• Design flow on page 1-12.
See Additional reading on page x for more information about the books described in this
section.
1.7.1 Documentation
The Cortex-R4 processor documentation is as follows:
Technical Reference Manual
The Technical Reference Manual (TRM) describes the functionality and the
effects of functional options on the behavior of the Cortex-R4 processor. It is
required at all stages of the design flow. The choices made in the design flow can
mean that some behavior described in the TRM is not relevant. If you are
programming the Cortex-R4 processor then contact:
• the implementer to determine:
— the build configuration of the implementation
— what integration, if any, was performed before implementing the
Cortex-R4 processor
• the integrator to determine the pin configuration of the device that you are
using.
Configuration and Sign-off Guide
The Configuration and Sign-off Guide (CSG) describes:
• the available build configuration options and related issues in selecting
them
• how to configure the Register Transfer Level (RTL) with the build
configuration options
• how to integrate RAM arrays
• how to run test vectors
• the processes to sign off the configured design.
The ARM product deliverables include reference scripts and information about
using them to implement your design. Reference methodology flows supplied by
ARM are example reference implementations. Contact your EDA vendor for
EDA tool support.
The CSG is a confidential book that is only available to licensees.
Integration Manual
The Integration Manual (IM) describes how to integrate the Cortex-R4 processor
into a SoC. It includes describing the pins that the integrator must tie off to
configure the macrocell for the required integration. Some of the integration is
affected by the configuration options used when implementing the Cortex-R4
processor.
The IM is a confidential book that is only available to licensees.