Signal Descriptions
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. A-2
ID073015 Non-Confidential
A.1 About the processor signal descriptions
The tables in this appendix list the processor signals, along with their dimensions and direction,
input or output, and a high-level description. Each table also has a clocking column, that
indicates by which clock a signal is sampled or driven. All signals are sampled on or driven from
the rising edge of the clock. The clocking column can also contain the following information:
Any Means the input is synchronised, inside the processor, so the input can be driven
from any clock.
Tie-off Means the input must be tied to a fixed value.
Reset Means the input must only be changed under reset.
Clocking is listed for all outputs, though some are typically synchronized into a different clock
before use.
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