ARM Cortex-R4 - Big-Endian Instruction Support

Programmers Model
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 3-27
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3.10 Big-endian instruction support
The processor supports little-endian or big-endian instruction format, and is dependent on the
setting of the CFGIE pin. This is reflected in bit [31] of the SCTLR. For more information, see
c1, System Control Register on page 4-37.
Note
The facility to use big-endian or little-endian instruction format is an implementation option,
and you can therefore remove it in specific implementations. If this facility is not present, the
CFGIE pin is still reflected in the SCTLR but the instruction format is always little-endian. The
Build Options Register indicates whether the processor is built with instruction endianness
control. See Build Options Registers on page 4-77.