System Control
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 4-78
ID073015 Non-Confidential
Table 4-56 shows the Build Options 1 Register bit assignments.
To access the Build Options 1 Register, read CP15 with:
MRC p15, 0, <Rd>, c15, c2, 0 ; read Build Options 1 Register
c15, Build Options 2 Register
The Build Options 2 Register characteristics are:
Purpose Reflects the build configuration options used to build the processor.
Usage constraints The Build Options 2 Register is:
• a read-only register
• accessible in Privileged mode only.
Configurations Available in all processor configurations.
Attributes See Table 4-57 on page 4-79.
Figure 4-55 shows the Build Options 2 Register bit assignments.
Figure 4-55 Build Options 2 Register bit assignments
Table 4-56 Build Options 1 Register bit assignments
Bits Name Function
[31:12] TCM_HI_INIT_ADDR Default high address for the TCM.
[11:0] - SBZ
31 25 24 23
22
21
19
17
16 14 13 12 11 7 6 3 026272830 29 1020 9 458
DUAL_CORE
DUAL_NCLK
NO_ICACHE
NO_DCACHE
ATCM_ES
BTCM_ES
NO_IE
NO_FPU
NO_MPU
MPU_REGIONS
BREAK_POINTS
WATCH_POINTS
NO_A_TCM_INF
NO_B0_TCM_INF
NO_B1_TCM_INF
TCMBUSPARITY
NO_SLAVE
ICACHE_ES
DCACHE_ES
N0_HARD_ERROR_CACHE
AXIBUSPARITY
2
RESERVED
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