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System Control
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 4-20
ID073015 Non-Confidential
Table 4-8 shows the PFR1 bit assignments.Register
To access the PFR1 read CP15 with:
MRC p15, 0, <Rd>, c0, c1, 1 ; Read PFR1
4.3.8 c0, Debug Feature Register 0
The ID_DFR0 characteristics are:
Purpose Provides information about the debug system for the processor.
Usage constraints ID_DFR0 is:
a read-only register
accessible in Privileged mode only.
Configurations Available in all processor configurations.
Attributes See Table 4-9 on page 4-21.
Figure 4-13 shows the ID_DFR0 bit assignments.
Figure 4-13 ID_DFR0 Register bit assignments
Table 4-8 PFR1 bit assignments
Bits Name Function
[31:12] - SBZ.
[11:8] Microcontroller programmers model Indicates support for Microcontroller programmers model:
0x0
= no support.
[7:4] Security extension Indicates support for Security Extensions architecture:
0x0
= no support.
[3:0] ARMv4 Programmers model Indicates support for standard ARMv4 programmers model:
0x1
= the processor supports the ARMv4 model.
Reserved
Microcontroller debug model – memory mapped
Trace debug model – memory mapped
Trace debug model – coprocessor
Core debug model – memory mapped
Core debug model – coprocessor
Secure debug model
31 24 23 20 19 16 15 12 11 8 7 4 3 0

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