System Control
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 4-19
ID073015 Non-Confidential
Figure 4-11 PFR0 Register bit assignments
Table 4-7 shows the PFR0 bit assignments.
To access the PFR0 read CP15 with:
MRC p15, 0, <Rd>, c0, c1, 0 ; Read PFR0
c0, Processor Feature Register 1
The PFR1 characteristics are:
Purpose Provides information about the execution state support and programmers
model for the processor.
Usage constraints PFR1 is:
• a read-only register
• accessible in Privileged mode only.
Configurations Available in all processor configurations.
Attributes See Table 4-8 on page 4-20.
Figure 4-12 shows the PFR1 bit assignments.
Figure 4-12 PFR1 Register bit assignments
Reserved State3
31 16 15 8 7 3 0
State2 State1 State0
41112
Table 4-7 PFR0 Register bit assignments
Bits Name Function
[31:16] - SBZ.
[15:12] State3 Indicates support for Thumb Execution Environment (ThumbEE):
0x0
= no support.
[11:8] State2 Indicates support for acceleration of execution environments in hardware or software:
0x1
= the processor supports acceleration of execution environments in software.
[7:4] State1 Indicates type of Thumb encoding that the processor supports:
0x3
= the processor supports Thumb encoding with all Thumb instructions.
[3:0] State0 Indicates support for ARM instruction set:
0x1
= the processor supports ARM instructions.
31 12 11 8 7 4 3 0
Reserved
Microcontroller programmer’s model
Security extension
ARMv4 Programmer’s model
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