ARM Cortex-R4 - Page 310

Debug
ARM DDI 0363G Copyright © 2006-2011 ARM Limited. All rights reserved. 12-36
ID073015 Non-Confidential
12.5.2 Claim Registers
The Claim Tag Set Register and the Claim Tag Clear Register enable an external debugger to
claim debug resources.
Claim Tag Set Register
The DBGCLAIMSET Register characteristics are:
Purpose Enables an external debugger to claim debug resources.
Usage constraints The DBGCLAIMSET Register is a read/write register, in which:
• the CLAIM bits are always RAO
• writing 0 to a CLAIM bit has no effect.
Configurations Available in all processor configurations.
Attributes See Table 12-27 on page 12-37.
Figure 12-16 on page 12-37 shows the DBGCLAIMSET bit assignments.
0xD10 836 MPUIR MPU Type Register
0xD14 837 MPIDR Multiprocessor Affinity Register
0xD18-0xD1C 838-839 - Alias of MIDR
0xD20 840 ID_PFR0 Processor Feature Register 0
0xD24 841 ID_PFR1 Processor Feature Register 1
0xD28 842 ID_DFR0 Debug Feature Register 0
0xD2C 843 ID_AFR0 Auxiliary Feature Register 0
0xD30 844 ID_MMFR0 Processor Feature Register 0
0xD34 845 ID_MMFR1 Memory Model Feature Register 1
0xD38 846 ID_MMFR2 Memory Model Feature Register 2
0xD3C 847 ID_MMFR3 Memory Model Feature Register 3
0xD40 848 ID_ISAR0 ISA Feature Register 0
0xD44 849 ID_ISAR1 ISA Feature Register 1
0xD48 850 ID_ISAR2 ISA Feature Register 2
0xD4C 851 ID_ISAR3 ISA Feature Register 3
0xD50 852 ID_ISAR4 ISA Feature Register 4
0xD54 853 ID_ISAR5 ISA Feature Register 5
Table 12-26 Processor Identification Registers (continued)
Offset (hex) Register number Mnemonic Function