Technical Reference Guide
LIST OF TABLES
T
ABLE
1–1. A
CRONYMS AND
A
BBREVIATIONS
.......................................................................................... 1-3
T
ABLE
2-1. F
EATURE
D
IFFERENCE
M
ATRIX
............................................................................................... 2-2
T
ABLE
2-2. C
HIPSET
C
OMPARISON
........................................................................................................... 2-16
T
ABLE
2-3. S
UPPORT
C
OMPONENT
F
UNCTIONS
........................................................................................ 2-16
T
ABLE
2-4. G
RAPHICS
S
UBSYSTEM
C
OMPARISON
.................................................................................... 2-18
T
ABLE
2-5. E
NVIRONMENTAL
S
PECIFICATIONS
........................................................................................ 2-19
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ABLE
2-6. E
LECTRICAL
S
PECIFICATIONS
................................................................................................ 2-19
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ABLE
2-7. P
HYSICAL
S
PECIFICATIONS
.................................................................................................... 2-20
T
ABLE
2-8.
D
ISKETTE
D
RIVE
S
PECIFICATIONS
.......................................................................................... 2-20
T
ABLE
2-9. 48
X
CD-ROM D
RIVE
S
PECIFICATIONS
................................................................................. 2-21
T
ABLE
2-10. H
ARD
D
RIVE
S
PECIFICATIONS
............................................................................................. 2-21
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ABLE
3–1. C
ELERON
P
ROCESSOR
S
TATISTICAL
C
OMPARISON
................................................................. 3-2
T
ABLE
3–2. P
ENTIUM
III P
ROCESSOR
S
TATISTICAL
C
OMPARISON
............................................................. 3-3
T
ABLE
3–3. SPD A
DDRESS
M
AP
(SDRAM DIMM).................................................................................... 3-6
T
ABLE
3–4. H
OST
/PCI B
RIDGE
C
ONFIGURATION
R
EGISTERS
(GMCH, F
UNCTION
0)................................. 3-8
T
ABLE
4-1. PCI D
EVICE
C
ONFIGURATION
A
CCESS
.................................................................................... 4-4
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ABLE
4-2. S
YSTEM
B
OARD
PCI D
EVICE
I
DENTIFICATION
........................................................................ 4-5
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ABLE
4-3. PCI B
US
M
ASTERING
D
EVICES
............................................................................................... 4-6
T
ABLE
4-4. LPC B
RIDGE
C
ONFIGURATION
R
EGISTERS
(ICH2, F
UNCTION
0) ............................................. 4-8
T
ABLE
4-5. PCI B
US
C
ONNECTOR
P
INOUT
................................................................................................. 4-9
T
ABLE
4-6. PCI/AGP B
RIDGE
C
ONFIGURATION
R
EGISTERS
(MCH, F
UNCTION
1) ................................... 4-13
T
ABLE
4-7. AGP B
US
C
ONNECTOR
P
INOUT
.............................................................................................. 4-14
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ABLE
4-8. M
ASKABLE
I
NTERRUPT
P
RIORITIES AND
A
SSIGNMENTS
........................................................ 4-16
T
ABLE
4-9. M
ASKABLE
I
NTERRUPT
C
ONTROL
R
EGISTERS
....................................................................... 4-17
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ABLE
4-10. D
EFAULT
DMA C
HANNEL
A
SSIGNMENTS
........................................................................... 4-19
T
ABLE
4-11. DMA P
AGE
R
EGISTER
A
DDRESSES
..................................................................................... 4-20
T
ABLE
4-12. DMA C
ONTROLLER
R
EGISTERS
.......................................................................................... 4-21
T
ABLE
4-13.
C
LOCK
G
ENERATION AND
D
ISTRIBUTION
............................................................................ 4-22
T
ABLE
4-14. C
ONFIGURATION
M
EMORY
(CMOS) M
AP
.......................................................................... 4-24
T
ABLE
4-15. S
YSTEM
B
OOT
/ROM F
LASH
S
TATUS
LED I
NDICATIONS
..................................................... 4-35
T
ABLE
4-16. S
YSTEM
O
PERATIONAL
S
TATUS
LED I
NDICATIONS
............................................................. 4-36
T
ABLE
4-17. S
YSTEM
I/O M
AP
................................................................................................................ 4-38
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ABLE
4-18. 82801 ICH2 GPIO R
EGISTER
U
TILIZATION
......................................................................... 4-39
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ABLE
4-19 LPC47B357 C
ONTROL
R
EGISTERS
....................................................................................... 4-40
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ABLE
4-20. LPC47B357 GPIO R
EGISTER
U
TILIZATION
......................................................................... 4-41
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ABLE
5–1. IDE PCI C
ONFIGURATION
R
EGISTERS
.................................................................................... 5-2
T
ABLE
5–2. IDE B
US
M
ASTER
C
ONTROL
R
EGISTERS
................................................................................ 5-2
T
ABLE
5–3.
40-P
IN
P
RIMARY
IDE C
ONNECTOR
P
INOUT
............................................................................ 5-3
T
ABLE
5–4. D
ISKETTE
D
RIVE
C
ONTROLLER
C
ONFIGURATION
R
EGISTERS
................................................. 5-5
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ABLE
5–5. D
ISKETTE
D
RIVE
I
NTERFACE
C
ONTROL
R
EGISTERS
................................................................ 5-6
T
ABLE
5–6. 34-P
IN
D
ISKETTE
D
RIVE
C
ONNECTOR
P
INOUT
....................................................................... 5-7
T
ABLE
5–7. DB-9 S
ERIAL
C
ONNECTOR
P
INOUT
........................................................................................ 5-8
T
ABLE
5–8. S
ERIAL
I
NTERFACE
C
ONFIGURATION
R
EGISTERS
.................................................................... 5-9
T
ABLE
5–9. S
ERIAL
I
NTERFACE
C
ONTROL
R
EGISTERS
............................................................................. 5-10
T
ABLE
5–10. P
ARALLEL
I
NTERFACE
C
ONFIGURATION
R
EGISTERS
........................................................... 5-13
T
ABLE
5–11. P
ARALLEL
I
NTERFACE
C
ONTROL
R
EGISTERS
...................................................................... 5-14
Compaq Deskpro and Evo Personal Computers
Featuring Intel Celeron and Pentium III Processors
Fifth Edition - March 2002
xi
T
ABLE
5–12.
DB-25 P
ARALLEL
C
ONNECTOR
P
INOUT
.............................................................................. 5-15