Technical Reference Guide
Chapter 5
INPUT/OUTPUT INTERFACES
5. Chapter 5 INPUT/OUTPUT INTERFACES
5.1 INTRODUCTION
This chapter describes the standard (i.e., system board) interfaces that provide input and output
(I/O) porting of data and specifically discusses interfaces that are controlled through I/O-mapped
registers. The following I/O interfaces are covered in this chapter:
♦ Enhanced IDE interface (5.2) page 5-1
♦ Diskette drive interface (5.3) page 5-4
♦ Serial interfaces (5.4) page 5-8
♦ Parallel interface (5.5) page 5-11
♦ Keyboard/pointing device interface (5.6) page 5-16
♦ Universal serial bus interface (5.7) page 5-22
♦ Audio subsystem (5.8) page 5-26
♦ Network interface controller (5.9) page 5-32
5.2 ENHANCED IDE INTERFACE
The enhanced IDE (EIDE) interface consists of primary and secondary controllers integrated into
the 82801 ICH2 component of the chipset. Two 40-pin IDE connectors (one for each controller)
are included on the system board. Each controller can be configured independently for the
following modes of operation:
Programmed I/O (PIO) mode – CPU controls drive transactions through standard I/O mapped
registers of the IDE drive.
♦
♦
♦
8237 DMA mode – CPU offloads drive transactions using DMA protocol with transfer rates
up to 16 MB/s.
Ultra ATA/100 mode – Preferred bus mastering source-synchronous protocol providing
transfer rates of 100 MB/s.
NOTE: These systems include 80-conductor data cables required for UATA/66 and /100
modes.
5.2.1 IDE PROGRAMMING
The IDE interface is configured as a PCI device during POST and controlled through I/O-mapped
registers at runtime.
Compaq Deskpro and Evo Personal Computers
Featuring Intel Celeron and Pentium III Processors
Fifth Edition - March 2002
5-1
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