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Compaq Evo D500 - Chapter 3 PROCESSOR;MEMORY SUBSYSTEM; 3.1 INTRODUCTION

Compaq Evo D500
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Technical Reference Guide
Chapter 3
PROCESSOR/
MEMORY SUBSYSTEM
3. Chapter 3 PROCESSOR/MEMORY SUBSYSTEM
3.1 INTRODUCTION
This chapter describes the processor/cache memory subsystem of Compaq Deskpro and Evo
Personal Computers covered in this guide. These systems feature a Celeron or Pentium III
processor and the 815E chipset (Figure 3-1). The 815E chipset supports up to three SDRAM
DIMMs (maximum of four sides, refer to section 3.3 for more information).
133-MHz
Memory Bus
Processor
64-Bit FSB
Cntl
Hub I/F
SDRAM
Cntlr.
FSB I/F
82815
GMCH
Direct AGP
Graphics
Cntlr.
J3
System Memory
DIMM
In
Socket
J1
Socket
Socket
J2
May be populated with optional DIMM
Covered in Chapter 6
Covered in Chapter 4
Figure 3–1. Processor/Memory Subsystem Architecture
This chapter includes the following topics:
Processor [3.2] page 3-2
Memory subsystem [3.3] page 3-5
Subsystem configuration {3.4] page 3-8
Compaq Deskpro and Evo Personal Computers
Featuring Intel Celeron and Pentium III Processors
Fifth Edition - March 2002
3-1

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