UD70
Issue code: 70nu2
Features 8-35
Status Word (#85.02)
Bit Notes
0 TI Timer event flag
0 indicates that no event has occurred
1 indicates that an event has occurred
Two events are defined, as follows:
Modes 0, 1 and 4: Counter wrap-around (over-flow or under-flow)
Modes 2 and 3: 1 to 0 transition on DIGIN0
The TI bit is automatically cleared if the TE flag is set in #85.01, otherwise it is cleared
when the status word is read.
1 OV Wrap-around flag
0 = No wrap-around
1 = Counter/timer has wrapped-around
This flag is valid for all timer modes.
The OV bit is automatically cleared when the status register is read.
Timer #85.03
The current timer/counter value can be read and written at any time.
When Mode 2 is selected, do not read this parameter (even in the WatchWatch
window), instead use #85.05 to read the timer/counter value.
The timer is a 16-bit timer with a range between 0 and 65535.
Re-load
value #85.04
When the timer/counter overflows or underflows the
OV flag is set. In
Modes 0, 1 and 4, the TI event flag is also set. If the re-load mode is enabled
(R set at 1), the timer/counter is initialized with the contents of the RELOAD
register. (In Mode 2, re-load occurs when DIGIN0 transitions from 1 to 0).
When R (bit 2 of #85.01) is set at 0, the timer/counter simply wraps-around
and continues to count. The value in the re-load register can be read and
written to at any time.
Mode 2
timer value
(#85.03)
Use this parameter to read the latched timer/counter value when Mode 2 is
selected. Do not read #85.03.
For an example of using the timer/counter unit, refer to the TimerTimer Unit Unit
topic in the DPL Toolkit on-line Help.
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