Note that the CFGBVS_0 pin is set automatically to GND (if VCC_CFG_PS_B13_B33 is less than or equal to 1.8
V) or to VCCO (if VCC_CFG_PS_B13_B33 is 2.5 V or 3.3 V).
Warning!
Use only VCC_IO voltages compliant with the equipped SoC device; any other voltages may damage
the equipped SoC device, as well as other devices on the Mars ZX3 SoC module.
Do not leave a VCC_IO pin floating, as this may damage the equipped SoC device, as well as other
devices on the Mars ZX3 SoC module.
Warning!
Do not power the VCC_IO pins when PWR_GOOD and PWR_EN signals are not active. If the module
is not powered, you need to make sure that the VCC_IO voltages are disabled (for example, by using
a switch on the base board, which uses PWR_GOOD as enable signal). Figure 9 illustrates the VCC_IO
power requirements.
Figure 9: Power-Up Sequence - VCC_IO in Relation with PWR_GOOD and PWR_EN Signals
2.9.6 Signal Terminations
Differential Inputs
There are no external differential termination resistors on the Mars ZX3 SoC module for differential inputs.
Differential input pairs on the module connector may be terminated either by external termination resistors
on the base board (close to the module pins), or by the SoC device’s internal termination resistors.
Internal differential termination is available only for certain VCCO voltages; please refer to Xilinx AR# 43989
for details.
Single-Ended Outputs
There are no series termination resistors on the Mars ZX3 SoC module for single-ended outputs. If required,
series termination resistors may be equipped on the base board (close to the module pins).
D-0000-424-004 18 / 48 Version 05, 21.08.2018
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