1.4 Accessories
1.4.1 Reference Design
The Mars ZX3 SoC module reference design features an example configuration for the Zynq-7000 SoC de-
vice, together with an example top level HDL file for the user logic.
A number of software applications are available for the reference design, that show how to initialize the
peripheral controllers and how to access the external devices. Pre-compiled binaries are included in the
archive, so that the user can easily check that the hardware is functional.
The reference design can be downloaded from the Enclustra download page [2].
1.4.2 Enclustra Build Environment
The Enclustra Build Environment [15] enables the user to quickly set up and run Linux on any Enclustra SoC
module. It allows the user to choose the desired target, and download all the required binaries, such as
bitstream and FSBL. It downloads and compiles all required software, such as U-Boot, Linux, and BusyBox
based root file system.
The Enclustra Build Environment features a graphical user interface (GUI) and a command line interface (CLI)
that facilitates the automatic build flow.
1.4.3 Mars PM3 Base Board
• Mars 200-pin SO-DIMM socket
• FMC LPC (Low Pin Count) connector (72 I/Os)
• 40-pin GPIO connector (optional, shared with FMC I/Os)
• RJ45 Gigabit Ethernet connector
• Mini HDMI connector for PCIe and LVDS applications (module dependent)
• Cypress FX3 USB 3.0 device controller (16-bit Slave-FIFO interface or 32-bit Slave-FIFO interface shared
with FMC I/Os)
• USB 3.0 B device connector
• USB 2.0 A host connector
• Micro USB 2.0 B device connector with FTDI USB device controller
• Battery holder for the real-time clock
• microSD card holder
• Fan connector, various switches and LEDs
• Single 12 V DC supply voltage or USB bus-powered (with restrictions)
• Form factor: 100 × 72 mm (pico-ITX)
Please note that the available features depend on the equipped Mars module type.
1.4.4 Mars EB1 Base Board
• Mars 200-pin SO-DIMM socket
• 2 × Mini Camera Link connectors (requires FPGA support)
• HDMI 1.3 connector (requires FPGA support)
• 40-pin GPIO connector (Anios)
• 3 × 12-pin GPIO connector (two of the connectors with Pmod™ compatible pinout)
• RJ45 Ethernet connector
• USB 2.0 A host connector
• Micro USB 2.0 device connector (shared)
• FTDI USB 2.0 device controller with micro USB device connector
• microSD card holder
• Various switches and LEDs
• Integrated Xilinx compatible JTAG adapter
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