2.14.1 DDR3 SDRAM Type
Table 19 describes the memory availability and configuration on the Mars ZX3 SoC module.
Module SDRAM Type Density Configuration Manufacturer
MA-ZX3-D9 MT41K128M16JT-125 2 Gbit 128 M × 16 bit Micron
MA-ZX3-D10 MT41K256M16HA-125 IT 4 Gbit 256 M × 16 bit Micron
MA-ZX3-D9 NT5CC128M16FP-DI 2 Gbit 128 M × 16 bit Nanya
MA-ZX3-D10 NT5CC256M16CP-DII 4 Gbit 256 M × 16 bit Nanya
Table 19: DDR3 SDRAM Types
Warning!
Other DDR3 memory devices may be equipped in future revisions of the Mars ZX3 SoC module. Please
check the user manual regularly for updates.
2.14.2 Signal Description
Please refer to the Mars ZX3 SoC Module FPGA Pinout Excel Sheet [4] for detailed information on the DDR3
SDRAM connections.
2.14.3 Termination
Warning!
No external termination is implemented on the Mars ZX3 SoC module. Therefore, it is strongly recom-
mended to enable the on-die termination (ODT) feature of the DDR3 SDRAM device.
2.14.4 Parameters
Please refer to the Mars ZX3 SoC module reference design [2] for DDR3 settings guidelines. The DDR3
SDRAM parameters and the DDR3 board timing information to be set in Vivado project are presented in
Tables 20 and 21.
The values given in Table 20 are for reference only. Depending on the equipped memory device on the
Mars ZX3 SoC module and on the DDR3 SDRAM frequency, the configuration may be different to the one
in the reference design. Please refer to the memory device datasheet for details.
D-0000-424-004 25 / 48 Version 05, 21.08.2018
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