3.8 QSPI Flash Programming from an External SPI Master
The signals of the QSPI flash are directly connected to the module connector for flash access. As the flash
signals are connected to the SoC device as well, the SoC device pins must be tri-stated while accessing the
QSPI flash directly from an external device.
This is ensured by pulling the PS_SRST# signal to GND followed by a pulse on PS_POR#, which puts the SoC
device into reset state and tri-states all I/O pins. PS_SRST# must be low when PS_POR# is released and kept
low until the flash programming has finished. Afterwards, all SPI lines and PS_SRST# must be tri-stated and
another reset impulse must be applied to PS_POR#.
Figure 12 shows the signal diagrams corresponding to flash programming from an external master.
Figure 12: QSPI Flash Programming from an External SPI Master - Signal Diagrams
Warning!
Accessing the QSPI flash directly without putting the SoC device into reset may damage the equipped
SoC device, as well as other devices on the Mars ZX3 SoC module.
3.9 NAND Flash Programming
The NAND flash on the Mars ZX3 SoC module can be programmed via JTAG or from u-boot.
The Xilinx SDK software offers NAND flash programming support via JTAG. For the programming operation,
type “nand_8” must be selected. Please note that Vivado Hardware Manager does not support the NAND
flash type equipped on the Mars ZX3 SoC module.
When programming the NAND flash in u-boot, the user must make sure that the NAND controller is en-
abled; the u-boot available in the Enclustra Linux build environment includes a built-in command to switch
the current configuration to use NAND flash as storage:
zx_set_storage NAND
Note that for a successful programming the flash image must be written avoiding the bad sectors of the
flash (by using nand.jffs2 command).
D-0000-424-004 37 / 48 Version 05, 21.08.2018
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