2.9.7 Multiplexed I/O (MIO) Pins
Details on the MIO/EMIO terminology are available in the Zynq UltraScale+ MPSoC Technical Reference
Manual [19].
Some of the MIO pins on the Mercury+ XU1 SoC module are connected to on-board peripherals, while
others are available as GPIOs; the suggested functions below are for reference only - always verify your MIO
pinout with the Xilinx device handbook.
Table 11 gives an overview over the MIO pin connections on the Mercury+ XU1 SoC module. Only the pins
marked with “user functionality” are available on the module connector.
D-0000-428-001 26 / 66 Version 13, 15.08.2019
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