details.
For more information, please refer to the Xilinx documentation [18] and support. Alternatively, the QSPI
flash can be programmed in u-boot or Linux by the SPI controller in the PS or from an SPI external master.
3.11 QSPI Flash Programming from an External SPI Master
The signals of the QSPI flash are directly connected to the module connector for flash access. As the flash
signals are connected to the MPSoC device as well, the MPSoC device pins must be tri-stated while access-
ing the QSPI flash directly from an external device.
This is ensured by pulling the PS_SRST# signal to GND followed by a pulse on PS_POR#, which puts the
MPSoC device into reset state and tri-states all I/O pins. PS_SRST# must be low when PS_POR# is released
and kept low until the flash programming has finished. Afterwards, all SPI lines and PS_SRST# must be
tri-stated and another reset impulse must be applied to PS_POR#.
Figure 15 shows the signal diagrams corresponding to flash programming from an external master.
In addition, a non-QSPI boot mode must be used during QSPI flash programming, otherwise the MPSoC
device will attempt to boot from the flash and will disturb the clock.
Figure 15: QSPI Flash Programming from an External SPI Master - Signal Diagrams
Warning!
Accessing the QSPI flash directly without putting the MPSoC device into reset may damage the equipped
MPSoC device, as well as other devices on the Mercury+ XU6 SoC module.
3.12 Enclustra Module Configuration Tool
In combination with an Enclustra base board, the QSPI flash can be programmed using Enclustra Module
Configuration Tool (MCT) [16]. For this method, a non-QSPI boot mode must be used during QSPI flash
programming. The entire procedure is described in the reference design documentation.
Please note that the Xilinx Zynq devices do not support slave serial configuration, therefore only flash pro-
gramming is supported by the Enclustra MCT for the Mercury+ XU6 SoC module.
D-0000-464-001 48 / 58 Version 02, 21.07.2021
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