44x/EN AP/Hb6
-70 MiCOM P40 Agile
Figure 47: Weak infeed trip logic
3.2.10 Loss of Load (LoL)
3.2.11 Loss of Load Accelerated Tripping (LoL)
The loss of load logic provides fast fault clearance for faults over the whole of a double end
fed protected circuit for all types of fault, except three phases. The scheme has the
advantage of not requiring a signalling channel. Alternatively, the logic can be chosen to be
enabled when the channel associated with an aided scheme has failed. This failure is
detected by permissive scheme unblocking logic, or a Channel Out of Service (COS) opto
input.
Any fault located within the reach of Zone 1 will result in fast tripping of the local circuit
breaker. For an end zone fault with remote infeed, the remote breaker will be tripped in Zone
1 by the remote relay and the local relay can recognise this by detecting the loss of load
current in the healthy phases. This, coupled with operation of a Zone 2 comparator causes
tripping of the local circuit breaker.
Before an accelerated trip can occur, load current must have been detected prior to the fault.
The loss of load current opens a window during which time a trip will occur if a Zone 2
comparator operates. A typical setting for this window is 40 ms as shown in Figure 48,
although this can be altered in the menu LoL: Window cell. The accelerated trip is delayed
by 18ms to prevent initiation of a loss of load trip due to circuit breaker pole discrepancy
occurring for clearance of an external fault. The local fault clearance time can be deduced as
follows:
t = Z1d + 2CB + LDr + 18ms
Where:
Z1d = maximum downstream zone 1 trip time
CB = Breaker operating time
LDr = Upstream level detector (LoL: I<) reset time
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