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Intel® Core i7
Intel Intel® Core i7 User Manual
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60
32
3094
Dev
Kit Manu
al
4.6.2.1
1
TPM Header /
Port 80
Add-
in
-Card Head
er
Table
37
. TPM Header/Port 80 Add-
in
-Card Header (J9A1)
Pin
Signal
Definition
1
CLK_PCI_TPM
PCI Clock Loop
b
ack
2
GND
Ground
3
LPC_FRAME
#
LPC Frame
4
N/C
Reserved
5
BUF_PLT_RST#
Reset
6
+V5_R1_TPM
5 volt supply
7
LPC_AD3
LPC Address/
D
ata 3
8
LPC_AD2
LPC Address/
D
ata 2
9
+V3.3S_R1
_TPM
3.3 volt sup
ply
10
LPC_AD1
LPC Address/
D
ata 1
11
LPC_AD0
LPC Address/
Data 0
12
GND
Ground
13
SMB_CLK_S3
SMB Clock
14
SMB_DATA_
S3
SMB Data
15
+V3.3A_R1
_TPM
3.3 volt sup
ply
16
INT_SERIRQ
Serial Interrupt
Request
17
GND
Ground
18
PM_CLKRUN#
PCI Clock Run
19
PM_SUS_STAT#
Suspend Status
20
TPM_DRQ#0
LPC DRQ
4.6.2.1
2
LPC Hot Docki
n
g
Table
38
.
LPC Hot Docking (J9E5)
Pin
Signal
1
D_LAD_0
2
D_LAD_2
3
D_LAD_1
4
D_LAD_3
5
LPCD_PWRG
D
6
LPCD_PWREN#
7
GND
8
LPCD_PC
I_PME#
59
61
Table of Contents
Default Chapter
3
Table of Contents
3
Revision History
6
1 About this Manual
7
Content Overview
7
Text Conventions
7
Table 1. Text Conventions
8
Glossary of Terms and Acronyms
9
Table 2. Terms
9
Table 3. Acronyms
11
Related Documents
14
Development Kit Technical Support
14
Online Support
14
Additional Technical Support
14
Table 4. Related Documents
14
2 Getting Started
15
Development Kit Contents
15
Additional Required Hardware Not Included in this Kit
16
Additional Required Software Not Included in this Kit
16
Workspace Preparation
16
System Setup
17
System Power-Up
18
System Power-Down
18
System BIOS
18
Configuring the BIOS
18
Programming BIOS Using a Bootable USB Device
19
Instructions to Flash BIOS on SPI
20
3 Development Board Features
21
Block Diagram
21
Mechanical Form Factor
21
Development Board Features Table
21
Figure 1. System Block Diagram
21
Table 5. Development Kit Feature Set Summary
22
Driver Key Features
23
BIOS Key Features
24
System Thermal Management
24
System Features and Operation
24
Processor
25
Figure 2. VID Override Circuit
26
Table 6. Supported DIMM Module Configurations
27
Table 7. Hardware Straps for Processor PCI Express* Interface Usage
28
Chipset
29
Figure 3. Block Diagram of On-Board LAN Implementations
30
Table 8. PCI Express* Ports
30
Table 9. Selection of I/O Voltage for the Intel ® High Definition Audio
31
Table 10. SATA Ports
31
Table 11. USB Port Mapping
32
Table 12. Jumper Setting for SPI Programming
33
Figure 4. BCLK Frequency Select Circuit
34
Displays
35
Figure 5. Platform Clocking Circuit
35
Figure 6. Intel Core™ I7 Processor Based Low-Power Platform Display Interfaces
37
Debugging Interfaces
38
Power Management
38
Power Measurement Support
38
Table 13. Power Management States
38
Table 14. Digital Multimeter
39
Table 15. Power Measurement Resistor for Power Rails
39
Power Supply Usage and Recommendation
43
4 Development Board Physical Hardware Reference
44
Primary Features
44
Figure 7. Component Locations - Top View
44
Figure 8. Component Locations - Bottom View
45
Table 16. Component Location
45
Connectors
47
Table 17. Connectors on the Motherboard
47
Back Panel Connectors
48
Configuration Settings
48
Figure 9. Back Panel Connector Locations
48
Table 18. Back Panel Connectors
48
Table 19. Configuration Jumper/Switches Settings
48
Power on and Reset Push Buttons
51
Leds
52
Table 20. Power-On and Reset Push Buttons
52
Table 21. Development Lit Leds
52
Other Headers
53
H8 Programming Header
53
Expansion Slots and Sockets
53
Table 22. H8 Programming Jumpers
53
Table 23. Expansion Slots and Sockets
54
Table 24. Fan Connector (J4C1)
54
Table 25. Front Panel Connector
54
Table 26. Edp Support Connector
55
Table 27. SATA Port 0 'Direct Connect' Connector Pinout (J8J1)
55
Table 28. SATA Ports 1 and 2/Esata Ports 3 and 4 Pinout (J7G2, J7G1, J6J1, J7J1)
56
Table 29. SATA Power Connector (J6H1)
56
Table 30. SPI Programming Header (J8E1)
56
Table 31. HAD Header for MDC Interposer (J9E4)
57
Table 32.HAD Header for MDC Interposer (J9E7)
57
Table 33. HAD Header for External HDMI Support (J8F1)
58
Table 34. LED Header (J8G3)
58
Table 35. Descriptor Security Override (J8F4)
59
Table 36. Controller Link Header (J8G2)
59
Table 37. TPM Header/Port 80 Add-In-Card Header (J9A1)
60
Table 38. LPC Hot Docking (J9E5)
60
Table 39. LPC Side Band Header (J9G2)
61
5 Daughter and Plug-In Cards
63
Pcie* Add-In Card
63
PCI Expansion Card
63
Figure 10. Pcie* Add-In Card
63
Port 80-83 Add-In Card
64
Figure 11. PCI Expansion Card
64
Figure 12. Port 80-83 Interposer Card
64
Figure 13. Block Diagram of Port 80-83 Add-In Card
65
Table 40. Jumper Settings for Port 80-80 Card
65
Dev Kit Manual 5
65
6 Heatsink Installation Instructions
66
Figure 14. Disassembled Fan/Heatsink Assembly
66
Figure 15. Bottom View of the CRB with Backplate in Place
67
Figure 16. Top View of Board with Pins Installed, through the Board, and into the Backplate (Backplate Not Visible)
68
Figure 17. Applying Thermal Grease to the Top of Processor Package
69
Figure 18. Squeeze Activation Arm Downward, Toward the Board
70
323094 Dev Kit Manual
70
Compression Assembly Handle
71
Figure 19. Installing Fan/Heatsink
71
Figure 20. Fan/Heatsink Power Plugged into Board
72
Figure 21. Completed Intel ® Core™ I7 Processor CRB with Fan/Heatsink
73
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Intel Intel® Core i7 Specifications
General
Brand
Intel
Model
Intel® Core i7
Category
Computer Hardware
Language
English
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