Intel Intel® Core i7 - Table 37. TPM Header;Port 80 Add-In-Card Header (J9 A1); Table 38. LPC Hot Docking (J9 E5)

60 323094 Dev Kit Manual
4.6.2.11 TPM Header / Port 80 Add-in-Card Header
Table 37. TPM Header/Port 80 Add-in-Card Header (J9A1)
Pin
Signal
Definition
1
CLK_PCI_TPM
PCI Clock Loopback
2
GND
Ground
3
LPC_FRAME#
LPC Frame
4
N/C
Reserved
5
BUF_PLT_RST#
Reset
6
+V5_R1_TPM
5 volt supply
7
LPC_AD3
LPC Address/Data 3
8
LPC_AD2
LPC Address/Data 2
9
+V3.3S_R1_TPM
3.3 volt supply
10
LPC_AD1
LPC Address/Data 1
11
LPC_AD0
LPC Address/Data 0
12
GND
Ground
13
SMB_CLK_S3
SMB Clock
14
SMB_DATA_S3
SMB Data
15
+V3.3A_R1_TPM
3.3 volt supply
16
INT_SERIRQ
Serial Interrupt Request
17
GND
Ground
18
PM_CLKRUN#
PCI Clock Run
19
PM_SUS_STAT#
Suspend Status
20
TPM_DRQ#0
LPC DRQ
4.6.2.12 LPC Hot Docking
Table 38. LPC Hot Docking (J9E5)
Pin
Signal
1
D_LAD_0
2
D_LAD_2
3
D_LAD_1
4
D_LAD_3
5
LPCD_PWRGD
6
LPCD_PWREN#
7
GND
8
LPCD_PCI_PME#