Matrox Solios Series - Page 134

134 Appendix B: Technical information
10 NC Not connected.
11 P0_LVDS_CLK_OUT+ Clock output for acq. path 0 (positive).
12 LVDS_AUX_IN1+ LVDS auxiliary input 1 for an unspecified acq. path (positive).
Signals only supported for acq. path 0: user-defined input 11.
Signals only supported for acq. path 1: trigger input 1, user-defined input 6, timer clock input, or
quadrature input bit 1.
Signals supported for any acq. path: trigger input 3.
13 P0_TTL_AUX_IO_1 TTL auxiliary input/output 1 for acq. path 0.
Supported signals: exposure output 0, exposure output 3, trigger input 1, user-defined input/output 3.
14 GND Ground.
15 TTL_AUX_IO_1 TTL auxiliary input/output 1 for an unspecified acq. path.
Signals only supported for acq. path 0: user-defined input/output 7.
Signals only supported for acq. path 1: exposure output 1, user-defined input/output 4.
Signals supported for any acq. path: trigger input 3.
16 GND Ground.
17 P1_LVDS_AUX_OUT1- LVDS auxiliary output 1 for acq. path 1 (negative).
See pin 2 for more information.
18 P1_LVDS_AUX_OUT0- LVDS auxiliary output 0 for acq. path 1 (negative).
See pin 33 for more information.
19 P0_LVDS_AUX_OUT1+ LVDS auxiliary output 1 for acq. path 0 (positive).
Supported signals: exposure output 1, user-defined output 6.
20 P0_LVDS_AUX_OUT0+ LVDS auxiliary output 0 for acq. path 0 (positive).
Supported signals: exposure output 0, user-defined output 5.
21 P1_LVDS_VSYNC_OUT- VSYNC output for acq. path 1 (negative).
See pin 36 for more information.
22 P1_LVDS_CLK_OUT- Clock output for acq. path 1 (negative).
See pin 7 for more information.
23 P0_LVDS_AUX_IN1- LVDS auxiliary input 1 for acq. path 0 (negative).
See pin 37 for more information.
24 OPTO_AUX_IN0+ Opto-isolated auxiliary input 0 for an unspecified acq. path (positive).
Signals only supported for acq. path 0: user-defined input 8.
Signals only supported for acq. path 1: trigger input 0, user-defined input 0, field polarity input.
Signals supported for any acq. path: trigger input 2.
25 P0_LVDS_VSYNC_OUT- VSYNC output for acq. path 0 (negative).
See pin 40 for more information.
Pin Signal Description