Maxon EPOS4 50/5 - Figure 3-24 Hsdigin1 Circuit Single-Ended (Analogously Valid for Hsdigin2; Table 3-33 Single-Ended High-Speed Digital Input Specification

Setup
Connections
EPOS4 50/5 Hardware Reference
CCMC | 2023-07 | rel11726
3-37
Table 3-33 Single-ended high-speed digital input specification
Figure 3-24 HsDigIN1 circuit “single-ended” (analogously valid for HsDigIN2…4)
Continued on next page.
High-speed digital input 1…4 (single-ended)
Input voltage 0…5 VDC
Max. input voltage ±12 VDC
Logic 0 <1.0 V
Logic 1 >2.4 V
Input high current
typically 210 A @ +5 VDC (HsDigIN1, 2)
typically 60 A @ +5 VDC (HsDigIN3, 4)
Input low current
typically −80 A @ 0 VDC (HsDigIN1, 2)
typically −7 A @ 0 VDC (HsDigIN3, 4)
Max. input frequency 6.25 MHz