Table 14. Oscillator/crystal recommendations (continued)
Checkbox Recommendation Explanation/Supplemental Recommendation
2. Instead of a crystal, the i.MX8 QM/QXP
32.768 kHz can be driven with an external
clock (oscillator) driven into the RTC_XTALI
input (RTC_XTALO floated).
The voltage level of this driving clock should not exceed
the voltage of the VDD_SNVS_LDO_1P8_CAP rail and the
frequency should be <100 kHz under typical conditions.
Do not exceed VDD_SNVS_LDO_1P8_CAP or damage/
malfunction may occur. The RTC_XTALI signal should not
be driven if the VDD_SNVS_CAP supply is off. This can lead
to damage or malfunction. For the RTC_XTALI V
IL
and V
IH
voltage levels, see the latest i.MX8 QM and i.MX 8QXP data
sheet available at www.nxp.com.
3. Connect a 24.00 MHz crystal between
XTALI and XTALO.
For the ESR selection, the negative resistance/ESR and
drive level must be considered at the same time. See the
processor datasheet for the general crystal requirements.
Internal load capacitors should be used. See Internal load
capacitor trimming (24 MHz and 32.768 kHz).
4. Do not connect VSS_SCU_XTAL to
VSS_MAIN.
Follow the implementation of the associated development
platform. To further reduce the oscillator noise, the
VSS_SCU_XTAL pins can be separated from VSS_MAIN.
2.2 JTAG signal termination
Table 15 is a JTAG termination chart showing what terminations should be placed on PCB designs.
Table 15. Recommended JTAG board terminations
JTAG Signal I/O Type External Termination Comment
JTAG_TCK Input 10 kΩ pull-down
JTAG_TMS Input 10 kΩ pull-up
JTAG_TDI Input 10 kΩ pull-up
JTAG_TDO 3-state output None
JTAG_TRSTB* Input 10 kΩ pull-up No connection from the JTAG to the processor.
* Not available on i.MX8 QXP
NXP Semiconductors
i.MX8 QM and QXP design checklist
i.MX8 QM / i.MX8 QXP Hardware Developer’s Guide, Rev. 2.4p, 06/2021
User's Guide 18 / 89
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