NXP Semiconductors i.MX8 QM - 3.4.12 JEDEC specification compliance

• The bandwidth is recommended to be configured to 12 GHz.
• Reference impedance: 50 Ω for signals and 0.1 Ω for power rails.
• Coupled mode: the rise time is set to 20 ps, and the coupling coefficient is set to 1 %.
Secondly, perform the time domain simulation:
• Stimulus pattern: a 500-bit random code and a different pattern for each signal within the same byte.
• Ideal power.
• The drive strength and ODT values should match the default settings in the Register Programming Aid (RPA) for the given
combination of the SoC and memory type.
• Probe at the die.
• Simulation at slow or fast corner (worst case).
• The eye waveform is triggered by aligning it with the timing reference (DQS/CLK).
• See the appropriate JEDEC standards for the Rx Mask definition: JESD209-4A for LPDDR4 and JESD79-3F for DDR3L.
Table 25. Simulation eye width recommendations
i.MX8QM LPDDR4 Simulations – 1.6 GHz
JEDEC Specifications Simulation Recommendation
CA Eye Width Min: 375 psec > 540 psec
DQ Write Eye Width - > 253 psec
i.MX8QXP LPDDR4 Simulations – 1.2 GHz
JEDEC Specifications Simulation Recommendation
CA Eye Width Min: 500 psec > 720 psec
DQ Write Eye Width - > 338 psec
i.MX8QXP DDR3L Simulations – 933 MHz
JEDEC Specifications Simulation Recommendation
CA Eye Width - > 980 psec
DQ Write Eye Width - > 468 psec
The simulation target recommendations by NXP are tighter than the JEDEC specifications to ensure any errors
in simulation techniques (for example, ideal power sources) do not result in the manufactured PCB missing the
required JEDEC specifications.
NOTE
3.4.12 JEDEC specification compliance
The i.MX 8 family of processors are designed and tested to work with the JEDEC JESD209-4A–compliant LPDDR4 and JEDEC
JESD79-3F-compliant DDR3L memories. Timing diagrams and tolerances required to work with these memories are specified in
the respective documents and are not reprinted here.
NXP Semiconductors
i.MX8 layout/routing recommendations
i.MX8 QM / i.MX8 QXP Hardware Developer’s Guide, Rev. 2.4p, 06/2021
User's Guide 49 / 89