— They should not pass over any power/GND voids or anti-etch.
• When placing connectors, make sure the ground plane clear-outs around each through-hole pin have ground continuity
between all pins.
• Maintain the parallelism (skew matched) between DP/DM and SS_TX/SS_RX and match the overall differential length
difference to less than 5 mils.
• Maintain symmetric routing for each differential pair.
• Do not route the DP/DM and SS_TX/SS_RX traces under oscillators or in parallel to the clock traces and/or data buses.
• Minimize the lengths of high-speed signals that run in parallel to the DP/DM and SS_TX/SS_RX pairs.
• Provide ground return vias within 50-mil distance from signal layer-transition vias when transitioning between different
reference ground planes.
3.12.2 USB VBUS and ID pin voltages
The i.MX8xXP/xM family processors use two different sets of IP for USB solutions. One IP is used for the USB_OTG1
implementation and a second IP is used for the USB_OTG2/USB3 implementation. These different solutions have different
voltages allowed on the VBUS and USB‐ID pins. It is important to ensure that the PCB applies the correct voltage supply levels
to the VBUS pins and the correct TTL logic levels to the USB‐ID pins. See Table 34 for the correct voltage levels (as specified by
the data sheets).
Table 34. USB pin voltage limits for i.MX8xXP/i.MX8xM
ID Input On-Chip Pull-Up Voltage* VBUS
USB_OTG1 1.8 V 5.0 V
USB_OTG2 3.3 V 3.3 V
* In a typical application, the ID pin does not require an external pull-up due to the on-chip pull-up. No connection results in the
device mode and grounding results in the host mode.
3.12.3 USB Type-C considerations
If PTN5110NTHQ is used as the PD PHY IC, the CC pins must be isolated from the Type-C connector when the device is not
powered to pass the Type-C compliance test TD 4.1.2. This can be realized by inserting one N-channel MOSFET between each
CC pin and the Type-C connector.
Figure 30. Implementation of isolation transistors for CC signals
NXP Semiconductors
i.MX8 layout/routing recommendations
i.MX8 QM / i.MX8 QXP Hardware Developer’s Guide, Rev. 2.4p, 06/2021
User's Guide 66 / 89
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