Figure 5. i.MX8 QM LPDDR4 MEK platform routing (layer 5)
Figure 6. i.MX8 QM LPDDR4 MEK platform routing (layer 10)
3.4.7 i.MX8 QXP LPDDR4-2400 routing recommendations
Note: It is strongly recommended to adopt NXP layout if possible. The design files are available at nxp.com or upon request.
LPDDR4-2400 must be routed with signal fly times matched, as shown in Table 23. Note that if the matched groups are not all
routed on the same layers with the same number of via transitions, the trace length/delay of the via transitions must be included
in the overall calculation.
NXP recommends that users simulate their LPDDR4 implementation before fabricating PCBs.
NXP Semiconductors
i.MX8 layout/routing recommendations
i.MX8 QM / i.MX8 QXP Hardware Developer’s Guide, Rev. 2.4p, 06/2021
User's Guide 36 / 89
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