NXP Semiconductors i.MX8 QM - Page 24

Table 17. i.MX8 QM DDR 29 x 29 mm package trace lengths (continued)
Ball Name
Length
(microns)
XIM delay
(ps)
Ball Name
Length
(microns)
XIM delay (ps)
DDR_CH0_DCF04 4639.406 45.3991 DDR_CH1_DCF04 4639.406 44.4202
DDR_CH0_DCF05 4734.544 44.8435 DDR_CH1_DCF05 4734.544 44.8185
DDR_CH0_DCF06 5464.536 47.6858 DDR_CH1_DCF06 5464.536 49.6408
DDR_CH0_DCF07 7733.346 65.9861 DDR_CH1_DCF07 7733.346 67.4829
DDR_CH0_DCF08 6581.169 57.5524 DDR_CH1_DCF08 6581.178 58.3514
DDR_CH0_DCF09 8442.241 71.1543 DDR_CH1_DCF09 8442.232 69.0238
DDR_CH0_DCF10 7135.477 62.1810 DDR_CH1_DCF10 7135.477 62.1676
DDR_CH0_DCF11 8034.133 68.0766 DDR_CH1_DCF11 8034.143 68.2538
DDR_CH0_DCF12 6724.164 59.1363 DDR_CH1_DCF12 6724.154 59.7347
DDR_CH0_DCF13 6036.270 52.7991 DDR_CH1_DCF13 6036.279 53.2113
DDR_CH0_DCF14 9374.566 76.0970 DDR_CH1_DCF14 9374.576 76.4025
DDR_CH0_DCF15 10184.452 82.7146 DDR_CH1_DCF15 10184.459 83.0032
DDR_CH0_DCF16 8665.398 69.7528 DDR_CH1_DCF16 8665.398 71.0229
DDR_CH0_DCF17 4831.641 45.2551 DDR_CH1_DCF17 4831.641 45.4623
DDR_CH0_DCF18 5750.691 52.8533 DDR_CH1_DCF18 5755.049 53.4975
DDR_CH0_DCF19 5318.163 49.2262 DDR_CH1_DCF19 5322.528 49.4664
DDR_CH0_DCF20 2820.533 31.5224 DDR_CH1_DCF20 2820.533 31.6700
DDR_CH0_DCF21 4433.669 41.8996 DDR_CH1_DCF21 4437.579 43.0937
DDR_CH0_DCF22 7691.037 65.7764 DDR_CH1_DCF22 7691.037 64.9914
DDR_CH0_DCF23 3776.834 37.7154 DDR_CH1_DCF23 3776.834 38.3014
DDR_CH0_DCF24 4903.692 46.4388 DDR_CH1_DCF24 4903.692 46.8339
DDR_CH0_DCF25 7584.973 65.4216 DDR_CH1_DCF25 7584.973 65.2606
DDR_CH0_DCF26 5704.160 53.1375 DDR_CH1_DCF26 5704.160 52.9999
DDR_CH0_DCF27 7410.269 63.7375 DDR_CH1_DCF27 7410.269 63.2216
DDR_CH0_DCF28 6878.795 60.3078 DDR_CH1_DCF28 6878.795 59.5766
Table continues on the next page...
NXP Semiconductors
i.MX8 layout/routing recommendations
i.MX8 QM / i.MX8 QXP Hardware Developer’s Guide, Rev. 2.4p, 06/2021
User's Guide 24 / 89