Table 37. i.MX8 QXP unused power rail strapping recommendations
Function Ball Name Recommendation if unused
ADC VDD_ADC_1P8
Must be powered;
directly connect
to VDD_ADC_DIG_1P8
GPU VDD_GPU (8 balls in total) 10 kΩ to ground
Tamper/CSI VDD_CSI_1P8_3P3, VDD_TMPR_CSI_1P8_3P3 Leave unconnected
MIPI-CSI & MIPI-
DSI
VDD_MIPI_1P8 10 kΩ to ground
1
VDD_MIPI_1P0 10 kΩ to ground
1, 4
PCIe VDD_PCIE_1P8, VDD_PCIE_LDO_1P0_CAP Leave unconnected
USB PHYs
VDD_USB_OTG_1P0, VDD_USB_3P3 10 kΩ to ground
1,2,3
VDD_USB_1P8 Must be powered
USB OTG1 USB_OTG1_VBUS Leave unconnected
3
USB OTG2 USB_OTG2_VBUS 10 kΩ to ground
1,3
Digital I/O
supplies
VDD_ADC_DIG_1P8, VDD_CAN_UART_1P8_3P3,
VDD_CSI_1P8_3P3, VDD_EMMC0_1P8_3P3,
VDD_EMMC0_VSELECT_1P8_3P3, VDD_MIPI_CSI_DIG_1P8_3P3,
VDD_MIPI_DSI_DIG_1P8_3P3, VDD_PCIE_DIG_1P8_3P3,
VDD_QSPI0A_1P8_3P3, VDD_QSPI0B_1P8_3P3,
VDD_SPI_MCLK_UART_1P8_3P3, VDD_SPI_SAI_1P8_3P3,
VDD_USDHC1_1P8_3P3, VDD_USDHC1_VSELECT_1P8_3P3,
VDD_ENET0_1P8_2P5_3P3, VDD_ENET0_VSELECT_1P8_2P5_3P3,
VDD_ENET_MDIO_1P8_3P3, VDD_ESAI_SPDIF_1P8_2P5_3P3
These digital I/O supplies
can be left unconnected
when the associated I/O
balls are not in use
CAUTION: Driving/
connecting associated I/O
balls is prohibited when the
supply is not powered
1
–
All balls can be connected and pulled down to ground as one group through one 10 kΩ resistor or as multiple groups
(according to the ball map location) through multiple 10 kΩ resistors.
2
–
The “USB Phys” designation includes all USB interfaces (USB_OTG1, USB_OTG2, and USB3). These power pins must be
properly connected/powered if any one of the three USB interfaces is used. VDD_USB_SS3_LDO_1P0_CAP must always be
powered, whether using an USB interface or not.
3
–
If the serial download mode is required, all USB OTG rails (1 and 2) MUST be powered, as per the data sheet
operating ranges table. In the serial download mode, both OTG ports are polled until activity is detected on one of the
ports. This process will fail if either OTG port is not powered correctly. Only if the serial download mode is never
required, either of the OTG supply rails can be considered unused.
4
–
If the MIPI DSI module is not used and the associated IO pins are used as GPIOs, the power rail must remain powered.
NXP Semiconductors
i.MX8 layout/routing recommendations
i.MX8 QM / i.MX8 QXP Hardware Developer’s Guide, Rev. 2.4p, 06/2021
User's Guide 72 / 89
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