LPC5411x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 2.1 — 9 May 2018 25 of 105
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
7.12 Memory mapping
The LPC5411x incorporates several distinct memory regions. The APB peripheral area is
64 KB in size and is divided to allow for up to 32 peripherals. Each peripheral is allocated
4 KB of space simplifying the address decoding.
Figure 6
shows the overall map of the entire address space from the user program
viewpoint following reset.
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