LPC5411x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 2.1 — 9 May 2018 36 of 105
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
7.19 Digital serial peripherals
7.19.1 USB 2.0 device controller
7.19.1.1 Features
• USB2.0 full-speed device controller.
• Supports ten physical (five logical) endpoints including one control endpoint.
• Supports Single and double-buffering.
• Supports Crystal-less operation and calibration of FRO using USB frames.
• Each non-control endpoint supports bulk, interrupt, or isochronous endpoint types.
• Link Power Management (LPM) supported.
7.19.2 DMIC subsystem
7.19.2.1 Features
• Pulse-Density Modulation (PDM) data input for left and/or right channels on 1 or 2
buses.
• Flexible decimation.
• 16 entry FIFO for each channel.
• DC blocking or unaltered DC bias can be selected.
• Data can be transferred using DMA from deep-sleep mode without waking up the
CPU, then automatically returning to deep-sleep mode.
• Data can be streamed directly to I
2
S on Flexcomm Interface 7.
To Next Page
Loading...
Need help?
General
