LPC5411x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 2.1 — 9 May 2018 24 of 105
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
7.8 System Tick timer (SysTick)
The ARM Cortex-M4 and ARM Cortex-M0+ cores include a system tick timer (SysTick)
that is intended to generate a dedicated SYSTICK exception. The clock source for the
SysTick can be the system clock or the SYSTICK clock.
7.9 On-chip static RAM
The LPC5411x supports up to192 KB SRAM with separate bus master access for higher
throughput and individual power control for low-power operation.
7.10 On-chip flash
The LPC5411x supports up to 256 KB of on-chip flash memory.
7.11 On-chip ROM
The 32 KB on-chip ROM contains the boot loader and the following Application
Programming Interfaces (API):
• In-System Programming (ISP) and In-Application Programming (IAP) support for flash
programming.
• ROM-based USB drivers (HID, CDC, MSC, and DFU). Flash updates via USB is
supported.
• Supports booting from valid user code in flash, USART, SPI, and I
2
C.
• Legacy, Single, and Dual image boot.
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