LPC5411x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 2.1 — 9 May 2018 98 of 105
NXP Semiconductors
LPC5411x
32-bit ARM Cortex-M4/M0+ microcontroller
18. Revision history
Table 43. Revision history
Document ID Release date Data sheet status Change notice Supersedes
LPC5411x v.2.1 20180509 Product data sheet - LPC5411x v.2.0
Modifications: • Updated Section 2 “Features and benefits”: text for serial interfaces: USB 2.0 full-speed device
controller with on-chip PHY and dedicated DMA controller supporting crystal-less operation in
device mode using software library. See Technical note TN00031 for more details.
LPC5411x v.2.0 20180420 Product data sheet - LPC5411x v.1.9
Modifications:
• Fixed Figure 38 “WLCSP49 Soldering footprint”.
• Added Figure 39 “LQFP64 Soldering footprint”.
LPC5411x v.1.9 20180126 Product data sheet - LPC5411x v.1.8
Modifications:
• Updated a feature in Section 7.19.5 “SPI serial I/O controller”: Maximum data rate of 48 Mbit/s in
master mode and 15 Mbit/s in slave mode for SPI functions. Was 71 Mbit/s in master mode.
• Updated Section 11.10 “SPI interfaces”: the maximum supported bit rate for SPI master mode is
48 Mbit/s. Was 71 Mbit/s in master mode.
LPC5411x v.1.8 20171102 Product data sheet - LPC5411x v.1.7
Modifications:
• Updated broken cross references throughout the document.
LPC5411x v.1.7 20170417 Product data sheet - LPC5411x v.1.6
Modifications:
• Updated Table 30 “Dynamic characteristics: I2S-bus interface pins [1][4]”
• Updated Table 16 “Static characteristics: Power consumption in deep-sleep and deep
power-down modes” and Table 17 “Static characteristics: Power consumption in deep-sleep and
deep power-down modes”: Conditions for I
DD
supply current.
LPC5411x v.1.6 20161222 Product data sheet - LPC5411x v.1.5
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