EasyManua.ls Logo

NXP Semiconductors PN544 C2 - NXP_MIFARE Commands and Registry

NXP Semiconductors PN544 C2
172 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 100 of 172
The response to this command is as follows:
Table 79. NXP_MIFARE_RAW Response parameters
Description Length
Response code 1
Status 1
Data N
Response code possible values: any of the ETSI HCI generic response code.
Status: bits b0 to b2 indicate information on valid bits in the last data byte (value 0
indicates all are valid, from 1 to 7 it indicated the number of valid bits), other bits are
RFU.
Data is the raw frame received from the card (including CRC).
9.8.2 NXP_MIFARE Commands and Registry
Table 80. NXP_MIFARE_CMD Command
Value Command Description
’21’
NXP_MIFARE_CMD
This command allows the exchange of data between the
host and a MIFARE ® card previously activated.
(Refer to [5] for details)
This command has the following parameters:
Table 81. NXP_MIFARE_CMD Parameters
Description Length
Cmd 1
Addr 1
Data N
Cmd is the MIFARE ® specific command byte (Refer to [5] for details)
7
7. Please keep in mind the different definitions of Littlle and Big Endian in Mifare and PN544
specification

Table of Contents

Related product manuals