NXP Semiconductors PN544 C2 - RF configuration

NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 161 of 172
9.20.4 RF configuration
Table 134. RF settings in EEPROM
Address Name Comment Default
0x9976
ANATXCWGSN - bits 4 to 7: Set_Conductance_NMOS_LoadNoMod in PCD mode
- Others bits are reserved
0xFF
0x9977
ANATXCWGSPON Set_Conductance_PMOS_LoadNoMod in PCD mode
0xFF
0x9979
ANATXMODGSN - bits 4 to 7: Set_Conductance_NMOS_LoadMod in PCD mode
- Others bits are reserved
0xFF
0x997A
ANATXMODGSPON Set_Conductance_PMOS_LoadMod in PCD mode
0x3E
0x992F
ANT Switch_ANT1+ANT2_to_GND
0x12
0x989E
AntennaLdoCon1 Value used for antenna self test scenario 3: start value for current
measurement
0x3F
0x989F
AntennaCwGsPOn Value used for antenna self test CWGSPON register
0x20
0x9F0F
PipeLenght Data length for pipelining
0x1C
0x9F10
Pipelining-Mode
Indicates SWP pipelining mode:
- Bit 0 : Set to 1 to activate pipelining RF to SWP in reader mode
- Bit 1 : Set to 1 to activate pipelining RF to SWP in card mode
- Bit 2 : Set to 1 to activate pipelining SWP to RF in reader mode
- Bit 3 : Set to 1 to activate pipelining SWP to RF in card mode
- Bit 4 : Set to 1 to activate pipelining RF to host in reader mode
- Bit 5 : Set to 1 to activate pipelining RF to host in card mode
- Bits 6 and 7 : RFU
0x03
Note: for details on RF settings, refer to [11].