NXP Semiconductors PN544 C2 - Communication from Slave to Master (PN544 to Host)

NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 31 of 172
00 0000 00
IRQ
MISO
SCK
H B
LEN
B
1
CRC
2
MOSI
NSS
Host sends the length of
the frame
LEN
1
00 00
CRC
1
Frame Transfer: Host -> PN544
PN544 does not have anything to
send, therefore it applies zeros
Fig 24. Sample SPI Host to PN544 Transfer
7.4.8.2 Communication from Slave to Master (PN544 to Host)
The PN5
44 will set to high the IRQ line. The host shall now apply the clock and toggle
NSS as long as no data is pending any more. This can be observed by either processing
the first byte which contains the length information or by looking at the IRQ line which
goes back to low level again once the buffer is emptied.
B
LEN
B
2
PN544 sends the length
of the frame
CRC
1
CRC
2
Upon LEN1 host knows how
often to apply the clock
IRQ
MISO
SCK
00 0000 00 00
MOSI
NSS
00
LEN
1
H
00
Frame Transfer: PN544 -> Host
PN544 requests a
transfer
Host does not have anything to
send, therefore it applies zeros
B
1
Fig 25. Sample SPI PN544 to Host Transfer