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NXP Semiconductors PN544 C2 - Acknowledge through CLKACK Pin

NXP Semiconductors PN544 C2
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NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 64 of 172
The acknowledge mechanism using timeout is described in the following figure:
1
2
Fig 38. Clock acknowledge with timeout
Step1: PN544 request the clock from the system (for clock request, see previous
chapter: ‘Clock Request & Release’, Fig 33 & Fig 35).
Step2: Whe
n the configured timeout occurs, PN544 is ensured to have the system
clock available.
9.4.4.2 Acknowledge through CLKACK pin
In this mode,
PN544 will wait for CLKACK (GPIO1) pin level to high to consider that
system clock is available. To setup such a configuration, the following EEPROM area has
to be set:
Table 56. Setting for clock acknowledge with CLKACK pin
Name Length
(bytes)
Value(s) Comments
PlClockAck 1 0x01 PN544 will wait for the
CLKACK pin to get high.

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