NXP Semiconductors PN544 C2 - Use of System Clock; Supported Clock Request;Acknowledge Setup.58

NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 58 of 172
9.4.1.2 Use of system clock
To s
etup the use of the system clock, the following EEPROM area has to be set:
Table 50. Setting for external oscillator
Name Length
(bytes)
Value(s) Comments
HW_Conf 1 Bit7 set to 0. Enable the Use of internal
FracNPLL for clock
generation
FRAC_ClkSel 1 0x01 to 0x05 Indicate the clock frequency
provided by the system
FRAC4_DIV
FRAC4_OOF0
FRAC4_OOF1
FRAC4_OOF2
FRAC4_CAL0
FRAC4_CAL1
6 [Registers
values]
Registers values
correspond to the input
clock frequency provided by
the system (To setup only if
FRAC_ClkSel is set to
0x05, meaning ‘Customized
Clock’ to be used).
Note: The FRAC4_xxx values (registers settings) are described in a separate document [9].
9.4.2 Supported Clock Request/Acknowledge setup
This chapter gives an overview of the clock mechanism; the detailed part is described in
the next chapters.
The supported Clock Request and Acknowledgment setups combination are described in
the following table:
Table 51. Supported Clock Setup
Request
Acknowledge
HCI Event
(SW)
GPIO Pin
(HW)
HCI Event (SW) √ (Fig 34) ×
GPIO Pin (HW) × √(Fig 32)
Timeout √(Fig 35) √(Fig 33)