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NXP Semiconductors PN544 C2 - Error Detection and Error Handling; Inter-Frame-Character Timeout

NXP Semiconductors PN544 C2
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NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 24 of 172
7.4.5 Error Detection and Error Handling
7.4.5.1 Inter-frame-character timeout
PN544 measures the time between characters within a frame. If the time exceeds the
timer T
IC
, PN544 considers the frame invalid. The error handling depends on the
communication path:
The value of T
IC
can be configured in EEPROM. If not needed, T
IC
detection can be
disabled. The T
IC
is mainly used to trigger the communication between the host and the
device. It is used with I2C and SPI host interface connections.
Note:
To disable T
IC
mechanism, the T
IC
timeout has to be set to NULL value.
(1) T
IC
= timer inter-frame character
Fig 16. Inter-frame-character definition
In case of Timeout on TX, PN544 will re-send the frame (IRQ is reset, and full frame is
re-sent).
T
IC
timeout value can be changed by setting the Host_TIC_MSB_TX &
Host_TIC_LSB_TX EEPROM area (See
HW configurationchapter)
The number of retries is defined in EEPROM as Host_Rx_Retry and Host_Tx_Retry.

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