NXP Semiconductors PN544 C2 - Page 105

NXP Semiconductors
UM191812
PN544 C2 User Manual
191812 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
User Manual Rev. 1.2 — 2010-06-16 105 of 172
HOST
PN544
mandatory
optional
ADM_CREATE_PIPE
ANY_OPEN_PIPE
EVT_READER_REQUESTED*
* This activates all reader types whose gate is opened
NXP_PL_RDPHASES
to allow Reader type A (0x01)
MIFARE ® 1K/4K Reader (from the host) example
EVT_TARGET_DISCOVERED
ADM Gate
Type A RF
Reader Gate
Type A RF
Reader Gate
Polling Loop
Gate
READER phase.
PN544 generates RF field. It
looks for external cards during
a fixed time.
IDLE phase (e.g.
100 ms)
Clock needed. Clock
request or crystal ...
READER phase.
Clock needed. Clock
request or crystal ...
External ISO14443A
MIFARE ® card in the
field
Initialization,
anticollision, and
activation
(i.e. for ISO14443A:
REQA, anticol,
SELECT)
Type A RF
Reader Gate
ANY_GET_PARAMETER ( SAK )
Type A RF
Reader Gate
ADM Gate
Type A
Reader Gate
Type A
Reader Gate
Type A
Reader Gate
Type A
Reader Gate
RF exchanges
(One arrow does NOT
represent one RF request)
NXP_MIFARE_CMD
(
Authentication A/B )
Type A
Reader Gate
Type A RF
Reader Gate
HOST
UICCPN544
Secure
Element
Contactless card
( MIFARE ® card )
(The NXP_PL_RDPHASES can be placed
before the EVT_READER_REQUESTED )
Possible « clock request » are not detailed here
Type A
Reader Gate
Type A RF
Reader Gate
MIFARE ®
authentication
ANY_OK
SAK => 0x08 = MIFARE ® 1K , 0x18 for MIFARE ® 4K
Gate Reader Type A:
NXP_MIFARE_CMD (
read,write …. )
Polling Loop
Gate
Fig 62. Activation and communication with a MIFARE card